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: ASIC design flow, combinational and sequential logic design, memory design, and Finite State Machines (FSM).

always blocks, initial blocks, and sequential procedural statements. Structural Modeling: Module instantiation and port mapping. Dataflow Modeling: Continuous assignments using assign . 2. Digital Design Principles (RTL Design) “Living in a Box: Chawl Life and the

Understanding the critical differences and why latches are generally avoided in synthesis.

Combinational outputs depend solely on the current state of the inputs. Examples include adders, multiplexers, and decoders. In Verilog, these are designed using continuous assignments or behavioral blocks with a sensitive list that reacts to all input changes.

Pair any of these papers with a specific visual/narrative angle: Examples include adders

Flip-flops, Registers, Counters, Memory elements.

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This style describes how the circuit acts without specifying exact logic gates. It relies on always blocks.

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: Demonstrates the algorithmic behavior of the design using sequential blocks ( always and initial ). This level focuses on what the circuit does rather than how it is built.